By Edmund M. Clarke, Paolo Zuliani (auth.), Tevfik Bultan, Pao-Ann Hsiung (eds.)
This e-book constitutes the refereed lawsuits of the ninth overseas Symposium on automatic expertise for Verification and research, ATVA 2011, held in Taipei, Taiwan, in October 2011.
The 23 revised usual papers awarded including five invited papers, eleven brief papers, and a pair of software papers, have been conscientiously reviewed and chosen from seventy five submissions. The papers tackle all theoretical and sensible points of automatic research, verification and synthesis; therefore delivering a discussion board for interplay among the nearby and the overseas learn groups and within the field.
Read Online or Download Automated Technology for Verification and Analysis: 9th International Symposium, ATVA 2011, Taipei, Taiwan, October 11-14, 2011. Proceedings PDF
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Extra info for Automated Technology for Verification and Analysis: 9th International Symposium, ATVA 2011, Taipei, Taiwan, October 11-14, 2011. Proceedings
Consider a sum-UWA A with n states, and consider the run τ of A on w = an+1 bn+1 . Each level of τ consists of states of A, where every state appears 0 or more times. We characterize the levels by vectors in Q , which we represent as n . For example, the vector (2, 0, 1) means that in this level there are 2 copies of q0 , 1 copy of q2 and no copies of q1 . Thus, τ can be thought of as a sequence of vectors. We say that a vector β is a conﬁguration of A. Let β be a conﬁguration, and consider what A does when it reads b.
We propose working out a standard interface for ANSI-C verifiers, as discussed below, then using this interface as a basis for tool operation and comparison. If successful, a similar process could be followed for other languages. Focusing on ANSI-C still requires tools to agree on, or at least identify differences between the precise way in which features that are left undefined in the standard are modelled. We propose a benchmark-based solution to this in Sec. 4. Property specification and environment modelling.
While some experimental evaluation is also usually expected, putting together a minimal prototype and concentrating on the theoretical side of a piece of work is a better short-term strategy for getting a paper accepted than painstakingly conducting a rigorous experimental evaluation on a large benchmark set, comparing with a range of other tools. Little or no credit will be given for ensuring that the tool being presented is robust and usable beyond the benchmark set used for evaluation. Understandably, time-pressured reviewers tend to scrutinise the theoretical detail of a novel technique readily available in the text of the paper, rather than investing time downloading, installing and experimenting with the associated implementation.
Automated Technology for Verification and Analysis: 9th International Symposium, ATVA 2011, Taipei, Taiwan, October 11-14, 2011. Proceedings by Edmund M. Clarke, Paolo Zuliani (auth.), Tevfik Bultan, Pao-Ann Hsiung (eds.)